| BODY HEIGHT | 0.165 INCHES MINIMUM AND 0.185 INCHES MAXIMUM |
| BODY OUTSIDE DIAMETER | 0.335 INCHES MINIMUM AND 0.370 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-100 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| DESIGN FUNCTION AND QUANTITY | 1 SWITCH, ANALOG AND 1 SWITCH, FIELD EFFECT TRANSISTOR |
| FEATURES PROVIDED | HERMETICALLY SEALED AND HYBRID AND NEGATIVE OUTPUTS AND POSITIVE OUTPUTS |
| INCLOSURE CONFIGURATION | CAN |
| INCLOSURE MATERIAL | GLASS AND METAL |
| INPUT CIRCUIT PATTERN | 4 INPUT |
| MAXIMUM POWER DISSIPATION RATING | 150.0 MILLIWATTS |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 18.0 VOLTS MAXIMUM POWER SOURCE |
| STORAGE TEMP RANGE | -55.0 TO 150.0 CELSIUS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TERMINAL TYPE AND QUANTITY | 10 PIN |
| TEST DATA DOCUMENT | 99380-0073-2100 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 1000.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 500.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |