| BODY HEIGHT | 0.062 INCHES MAXIMUM |
| BODY LENGTH | 0.995 INCHES MINIMUM AND 1.005 INCHES MAXIMUM |
| BODY WIDTH | 0.745 INCHES MINIMUM AND 0.755 INCHES MAXIMUM |
| DESIGN FUNCTION AND QUANTITY | 1 COMPARATOR AND 2 FLIP-FLOP, J-K AND 1 GATE, NOR AND 1 GATE, AND |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND NEGATIVE OUTPUTS AND POSITIVE OUTPUTS AND W/CLOCK AND W/RESET |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| INPUT CIRCUIT PATTERN | 23 INPUT |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| OPERATING TEMP RANGE | -55.0 TO 100.0 CELSIUS |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 6.0 VOLTS MAXIMUM POWER SOURCE |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TERMINAL TYPE AND QUANTITY | 36 FLAT LEADS |
| TEST DATA DOCUMENT | 17863-7104100 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |